1. Field of the Invention
The present invention pertains to packaged electronic circuitry, and more particularly to a test probe useful for field testing of electronic circuitry associated with so-called chip carriers which are utilized in mounting ceramic and plastic integrated circuit packages.
2. Background Art
The ability to test a circuit, both during manufacture and in field applications, is a very important requirement in electronic technology as currently practiced. In the same field there exists a constant requirement for more dense, faster and cheaper packaging concepts. In many ways, these two requirements contradict each other; that is to say that test point capability usually implies some sort of test access connector with many imput and output connections to electrically access circuit functions both during passive and active modes. Obviously, the supplying of additional connectors for testing purposes adds substantial additional cost to the product, as well as adding additional requirements for space on printed wiring cards, backplanes, etc.
Many electronic circuits today utilize integrated circuits in a so-called dual in-line packaged arrangement (DIP). By removing the dual in-line packaged integrated circuit from an associated socket, the socket then becomes a convenient test access connector. A multi-leader dual in-line package test probe in then capable of being inserted into the socket during testing. After testing is completed, the probe may be removed and the dual in-line packaged integrated circuit is replaced. The present invention anticipates that a similar concept could apply to today's high density chip carriers and chip carrier sockets as frequently utilized in today's technology.
Chip carriers are units designed into products to take advantage of high packaging density and high speed operation. Chip carriers which utilize integrated circuit packages are available in ceramic and plastic packages and in varieties both with and without leads. In most instances there are commercially available chip carrier sockets which are capable of accepting either version.
Typically speaking, chip carriers are cost effective in the 40 to 100 input/output lead range. Below 40 connections, dual in-line packages predominate and above 100 input/output connections pin grid arrays dominate. As many new products require only input/output connections within that 40 to 100 input/output lead range, there use has become quite extensive. Accordingly, a requirement for a test probe for chip carrier sockets appears to the highly desirable, such units being unknown at the present time.